Gate CSE 1992 Previous-Year Questions (PYQ)
Section-A
1. Fill in the blanks:
(i) The Boolean function in sum of products form where K-map is given below (figure) is: ________
(ii) Consider a 3-bit error detection and 1-bit error correction Hamming code for 4-bit data. The extra parity bits required would be ______ and the 3-bit error detection is possible because the code has a minimum distance of _________.
(iii) Many microprocessors have a specified lower limit on clock frequency (apart from the maximum clock frequency limit) because _______
(iv) Many of the advanced microprocessors prefetch instructions and store it in an instruction buffer to speed up processing. This speed up is achieved because ______
(v) A simple and reliable data transfer can be accomplished by using the ‘handshake protocol’. It accomplishes reliable data transfer because for every data item sent by the transmitter ______
(vi) In an 11-bit computer instruction format, the size of address field is 4-bits. The computer uses expanding OP code technique and has 5 two-address instructions and 32 two-address instructions and the number of zero-address instructions it can support is ______
(vii) Macro expansion is done in pass one instead of pass two in a pass macro assembler because _______
(viii) The purpose of instruction location counter in an assembler is _______
(ix) Complexity of Kruskal’s algorithm for finding the minimum spanning tree of an undirected graph containing n vertices and m edges if the edges are sorted is _______
(x) Maximum number of edges in a planar graph with n vertices is _______
2. Choose the correct alternatives (more than one may be correct) and write the corresponding letters only:
(i) The operation which is commutative but not associative is:
(a) AND
(b) OR
(c) EX-OR
(d) NAND
(ii) All digital circuits can be realized using only
(a) Ex-OR gates
(b) Multiplexers
(c) Half adders
(d) OR gates
(iii) Bit-slice processors
(a) Can be cascaded to get any desired word length processor
(b) speed of operation is independent of the word length configured
(c) don’t contain anything equivalent of program counter in a ‘normal’ microprocessor
(d) contain only the data path of a ‘normal’ CPU
(iv) PCHL is an instruction in 8085 which transfers the contents of the register pair HL to PC. This is not a very commonly used instruction as it changes the flow of control in rather ‘unstructured’ fashion. This instruction can be useful in implementing
(a) if ……. then ……..else …….. construct
(b) while …… construct
(c) case …… construct
(d) call …… construct
(v) Start and stop bits do not contain an ‘information’ but are used in serial
communication for
(a) Error detection
(b) Error correction
(c) Synchronization
(d) Slowing down the communications
(vi) Which of the following problems is not NP-hard?
(a) Hamiltonian circuit problem
(b) The 0/1 Knapsack problem
(c) Finding bi-connected components of a graph
(d) The graph coloring problem
(vii) A 2-3 tree is a tree such that
(a) all internal nodes have either 2 or 3 children
(b) all paths from root to the leaves have the same length
The number of internal nodes of a 2-3 tree having 9 leaves could be
(a) 4 (b) 5 (c) 6 (d) 7
(viii) A non-planar graph with minimum number of
vertices has
(a) 9 edges,
6 vertices
(b) 6 edges,
4 vertices
(c) 10
edges, 5 vertices
(d) 9 edges,
5 vertices
(ix) The Following algorithm(s) can be used to sort n integers in the range [1………n3] in O(n) time
(a) Heap sort
(b) Quick sort
(c) Merge sort
(d) Radix sort
(x) At a particular time of computation, the value of a counting semaphore is 7. Then 20
P operations and 15 V operations were completed on this semaphore. The resulting value of the semaphore is:
(a) 42
(b) 2
(c) 7
(d) 12
(xi) A computer system has 6 tape drives, with n process completing for them. Each process may need 3 tape drives. The maximum value of n for which the system is guaranteed to be deadlock free is:
(a) 2 (b) 3 (c) 4 (d) 1
(xii) Which of the following is an example of a spooled device?
(a) The terminal used to the input data for a program being executed.
(b) The secondary memory device in a virtual memory system
(c) A line printer used to print the output of a number of jobs.
(d) None of the above
(xiii) For a context-free grammar, FOLLOW(A) is the set of terminals that can appear immediately to the right of non-terminal A in some “sentential” form. We define two sets LFOLLOW(A) and RFOLLOW(A) by replacing the word “sentential” by “left sentential” and “right most sentential” respectively in the definition of FOLLOW(A).
Which of the following statements is/are true?
(a) FOLLOW(A) and FOLLOW (A) may be different.
(b) FOLLOW(A) and FOLLOW (A) are always the same.
(c) All the three sets are identical.
(d) All the three sets are different.
(xiv) Consider the SLR(1) and LALR(1) parsing tables for a context free grammar. Which of the following statements is/are true?
(a) The go to part of both tables may be different.
(b) The shift entries are identical in both the tables.
(c) The reduce entries in the tables may be different.
(d) The error entries in the tables may be different.
(xv) Which of the following predicate calculus statements is/are valid:
(a) (∀x) P(x) ∨ (∀x) Q(x) → (∀x){P(x) ∨ Q(x)}
(b) (∃x) P (x) ∧ (∃x) Q(x) → (∃x){P(x) ∧ Q(x)}
(c) (∀x){P (x) ∨ Q{x)} → (∀x) P(x) ∨ (∀x) Q(x)
(d) (∃x){P (x) ∨ Q (x)} → ∼(∀x) P (x) ∨ (∃x) Q (x)
(xvi) Which of the following is/are tautology
(a) a ∨ b → b ∧ c
(b) a ∧ b → b ∨ c
(c) a ∨ b → (b → c)
(d) a → b → (b → c)
(xvii) Which of the following regular expressions are true?
(a) r(*) = r*
(b) (r*s*) = (r + s)*
(c) (r + s)* = r* + s*
(d) r*s* = r* + s*
(xviii) If G is a context-free grammar and w is a string of length I in L(G), how long is a derivation of w in G, if G is in Chomsky normal form?
(a) 21
(b) 21 + 1
(c) 21 – 1
(d) I
(xix) Context-free languages are
(a) closed under union
(b) closed under complementation
(c) closed under intersection
(d) closed under Kleene closure
(xx) In which of the cases stated below is the following statement true? “For every non-deterministic machine M1 there exists an equivalent deterministic machine M2 recognizing the same language”.
(a) M1 is non-deterministic finite automaton
(b) M1 is a non-deterministic PDA
(c) M1 is a non-deterministic Turing machine
(d) For no machine M1 use the above statement true
3. Write short answers to the following:
(i) Which of the following macros can put a macro assembler into an infinite loop?
| .MACRI M1,X | .MACRO M2, X |
| .. IF EQ,X | .IF EQ, X |
| M1 X+1 | M2X |
| .ENDC | .ENDC |
| .IF NE, X | .IF NE, X |
| WORD X | .ENDC |
| .ENDM | .ENDM |
Give an example of a call that does so.
(ii) Mention the pass number for each of the following activities that occur in a two-pass assembler
(a) object code generation
(b) literals added literal table
(c) listing printed
(d) address resolution of local symbols
(iii) How many edges are there in a forest with p components having n vertices in all?
(iv) Assume that the last element of the set is used as partition element in Quicksort. If n distinct elements from the set [1.. … n] are to be sorted, give an input for which Quicksort takes maximum time.
(v) Which page replacement policy sometimes leads to more page faults when size of memory is increased?
Section - B
4. (a) Consider addition in two’s complement arithmetic. A carry from the most significant bit does not always correspond to an overflow. Explain what is the condition for overflow in two’s complement arithmetic.
(b) A priority encoder accepts three input signals (A, B, and C) and produce a two-bit output (X1, X0 ) corresponding to the highest priority active input signal. Assume A has the highest priority followed by B, and C has the lowest priority. If none of the inputs are active, the output should be 00. Design the priority encoder using 4:1 multiplexers as the main components.
(c) Design a 3-bit counter using D-flip-flops such that not more than one flip-flop changes state between any two consecutive states.
5. (a) The access times of the main memory and the Cache memory, in a computer system, are 500 n sec and 50 n sec, respectively. It is estimated that 80% of the main memory requests are for read the rest for write. The hit ratio for the read access only is 0.9, and a write-through policy (where both main and cache memories are updated simultaneously) is used. Determine the average time of the main memory.
(b) Three devices A, B, and C are connected to the bus of a computer, input/output transfers for all three devices use interrupt control. Three interrupt request lines INTR1, INTR2, and INTR3 are available with priority of INTR1 > priority of INTR2 > priority of INTR3.
Draw a schematic of the priority logic, using an interrupt mask register, in which Priority of A > Priority of B > Priority of C.
6. A microprocessor is capable of addressing 1 megabyte of memory with a 20-bit address bus. The system to be designed requires 256 K bytes of RAM, 256 K bytes of EPROM, 16 l/0 devices (memory-mapped I/O) and 1 K byte of EERAM (electrically erasable RAM).
(a) Design a memory map (to reduce decoding logic) and show the decoding logic if the components available are:
| Type | Size | Speed |
| RAM | 6 K x 8 | 140 n sec |
| EPROM | 256 K X 8 | 150 n sec |
| EERAM | 256 X 8 | 500 n sec-read 31JSec-write |
(b) The microprocessor is operating at 12.5 mHz and provides a time equivalent to two clock cycles for memory read and write. Assuming control signals similar to 8085, design the extra logic required for interfacing EERAM.
7. Consider the function F(n) for which the pseudo code is given below:
Function F(n)
begin
F1 ← 1
if(n=1) then F ← 3
else For i=1 to n do
begin
C ← 0
For j=1 to F(n-1) do
begin C ← C + 1 end
F1 = F1 * C
end
F = F1
end
[n is a positive integer greater than zero]
(a) Derive a recurrence relation for F(n)
(b) Solve the recurrence relation for a closed form solutions of F(n).
8. Let T be a Depth First Tree of an undirected graph G. An array P indexed by vertices of G is given. P[V] is the parent of vertex V, in T. Parent of the root is the root itself.
Give a method for finding and printing the cycle formed if the edge (u, v) of G not in T (i.e., e ∈ G – T ) is now added to T.
Time taken by your method must be proportional to the length of the cycle. Describe the algorithm in a PASCAL – like language. Assume that the variables have been suitably declared.
9. Suggest a data structure for representing a subnet S of integers from 1 to n. The following operations on the set S are to be performed in constant time (independent of cardinality of S).
| (i) MEMBER (X): | Check whether X is the set S or not |
| (ii) FIND-ONE(S): | If S is not empty, return one element of the set S ( any arbitrary element will do) |
| (iii) ADD (X): | Add integer x to set S |
| (iv) DELETE(X): | Delete integer x from S. |
Give pictorial examples of your data structure. Give routines for these operations in an English like language. You may assume that the data structure has been suitably initialized. Clearly state your assumptions regarding initialization.
10. (a) What type of parameter passing mechanism (call-by-value, call-by-reference, call-by-name, or-by-value result) is the following sequence of actions truing to implement for a procedure call P (A[i]) where P (i:integer) is a procedure and A is an integer array?
1. Create a new local variable, say z.
2. Assign to z the value of A[i].
3. Execute the body of P using z for A[i]
4. Set A[i] to z.
Is the implementation correct? Explain and correct it if necessary. You are supposed to make only small changes.
(b) Show the activation records and the display structure just after the procedures called at lines marked x and y have started their execution. Be sure to indicate which of the two procedures named A you are referring to.
Program Test;
Procedure A;
Procedure B;
Procedure A;
.......
end a;
begin
y : A;
end B;
begin
B;
end A;
begin
x : A;
end Test.
11. (a) Write syntax directed definitions (semantic rules) for the following grammar to add the type of each identifier to its entry in the symbol table during semantic analysis. Rewriting the grammar is not permitted and semantic rules are to be added to the ends of productions only.
D → TL;
T → int
T→ real
L → L, id
L → id
(b) Write 3-address intermediate code (quadruples) for the following boolean expression in the sequence as it would be generated by a compiler. Partial evaluation of Boolean expressions is not permitted. Assume the usual rules of precedence of the operators.
(a + b) > (c +d) or a > c and b < d